1. Field of the Invention
The present invention concerns a semiconductor light emitting device suitable to application, for example, to a multi-beam semiconductor laser device or a multi-beam semiconductor diode device, as well as a manufacturing method thereof.
2. Description of Related Art
A semiconductor light emitting device such as a semiconductor laser or a semiconductor light emitting diode has been used, for example, as an optical device for conducting recording and/or reproduction to an optical recording medium such as an optical disc, or as a light source for a laser beam printer or the like. In recent years, a demand for a multi-beam arrangement has been increased more and more for driving a plurality of light emitting sections independently of each other, for enabling recording and/or reproduction or printing at a higher speed by using such semiconductor light emitting devices.
On the other hand, for attaining cost reduction and attaining increased speed, it is necessary to reduce the size of an optical system to the multi-beam semiconductor light emitting device and, correspondingly, a demand has been increased for higher degree of integration so as to narrow the beam pitch as much as possible.
In a semiconductor light emitting device, for example, a semiconductor multi-beam laser for enabling independent driving and intended for higher integration degree, as shown in a schematic perspective view of FIG. 9, a plurality of semiconductor light emitting sections, namely, four semiconductor laser devices M1 to M4 in the illustrated example are arranged side by side such that they can be driven independently to a semiconductor substrate 21 at least comprising a first clad layer 2, an active layer 3, and a second clad layer 4 on a semiconductor substrate body 1.
A method of manufacturing the semiconductor light emitting device is to be explained with reference to schematic cross sectional views for each of steps in FIG. 10 to FIG. 13 and a schematic plan view for a portion of steps shown in FIG. 15 and FIG. 16.
At first, as shown in FIG. 10A, on a semiconductor substrate 1, for example, made of an n-type GaAs, there are epitaxially grown a first clad layer 2 made of an n-type AlGaAs, an active layer 3 made, for example, of an intrinsic AlGaAs and having a smaller band gap compared with the clad layer 2 and a second clad layer 4 made of p-type AlGaAs successively.
As shown in FIG. 10C and FIG. 14, and with hatched lines in FIG. 14, current block layers 5 are formed being arranged in parallel in a stripe pattern to the second clad layer 4.
The current block layers 5 are formed on the area between portions for forming the semiconductor light emitting sections M1 to M5 described above and the area corresponding to the outer side of both of outer M1 and M4 by etching grooves 6 in a stripe pattern respectively as shown in FIG. 10B.
Subsequently, an n-type GaAs semiconductor layer of a conduction type different from the second clad layer 4 is epitaxially grown entirely so as to bury the inside of the grooves 6 although not illustrated and etched entirely from the surface thereof to form current block layers 5 formed by leaving the n-type GaAs semiconductor layer only in the grooves as shown in FIG. 10C and FIG. 14.
As shown in FIG. 12A, a cap layer 7 made of a p-type GaAs of a conduction type identical with that of the second clad layer is epitaxially grown entirely covering the current block layers 5 to constitute a semiconductor substrate 21.
As shown in FIG. 11B, electrodes isolated from each other, four electrodes in the illustrated example, first to fourth electrodes A1 to A4 are deposited in ohmic contact as anode electrodes in this example on the cap layer 7 between each of adjacent current block layers 5. In this case, the electrodes A1 and A4 on both sides, a portion thereof is extended to the outside in an L-shaped pattern.
As shown in FIG. 11C and FIG. 15, an isolation groove 8 is formed between each of the electrodes A1 to A4 (indicated by hatched lines in FIG. 15) from the cap layer 7 to a thickness at least traversing the active layer 3.
As shown in FIG. 12A, an interlayer insulation layer 9 is formed over the entire surface by a CVD (Chemical Vapor Deposition) method.
As shown in FIG. 12B, first to fourth openings 9W1 to 9W4 are perforated on the electrodes A1 to A4, respectively, to the interlayer insulation layer 9 (only the first and fourth openings 9W1 and 9W4 are disclosed in the cross section of FIG. 12B).
As shown in FIG. 12C, a flattening insulation material 10 is coated over the entire surface so as to bury the inside of each of the isolation grooves 8.
Subsequently, as shown in FIG. 13 and FIG. 16, the first to fourth openings 9W1-9W2 are opened again to the flattening insulation material 10 from the surface thereof and are etched back in a plane manner to the position that the first to fourth electrodes A1 to A2 are exposed to the outside through the openings 9W1 -9W4.
Then, as shown in FIG. 9, conductor layers L2 and L3 in ohmic contact with the second and third electrodes A2 and A3 respectively through the second and the third openings 9W2 and 9W3 are extended and formed overriding the interlayer insulation layers 9, bonding pads PD2 and PD3 are constituted at second and third extended ends of the conductor layers L2 and L3, and first and fourth bonding pads PD1 and PD4 are constituted with the electrodes A1 and A4 exposed through the first and fourth openings 9W1 and 9W4.
Although not illustrated, external leads, for example, Au wires are bonded to the bonding pads PD1 to PD4 respectively.
Further, a common counter electrode K, namely, a cathode electrode in the example described above is deposited, for example, in an ohmic contact entirely on the rear face of the semiconductor substrate body 1.
In this constitution, when driving voltage is applied between each of the anode electrodes A1 to A4 and the common cathode electrode K independently, current is supplied restrictively in the stripe portions between the electrodes A1 to A4 and the electrode K sandwiched by the current block layers 5 and current is injected restrictively in the active layer 3 below the stripe.
Opposing end faces 21m1 and 21m2 of the semiconductor substrate 21 constituting both ends of the stripe are formed into a mirror face being constituted, for example, cleavage surface and stripe-like light resonators are constituted in the current injection region between the end faces 21m1 and 21m2 respectively and laser beams are emitted from both end faces. That is, first to fourth semiconductor light emitting sections M1 to M4 are constituted in respective portions of the stripes.
Since the laser devices, that is, the semiconductor light emitting sections M1 to M4 are isolated from each other by the isolation grooves 8 and the anode electrodes A1 to A4 are constituted electrically independent of each other, they can be driven independently.
However, as the integration degree is increased in the semiconductor multi-beam laser with the constitution described above, since the distance between each of the laser devices, namely, each of the semiconductor light emitting sections M1 to M4 is narrowed, electric cross-talk occurs, actually, between the laser devices, for example, in a case where one of light emitting sections of adjacent laser devices is driven to oscillate continuously, while the other is put to intermittent driving, such that large spike noises occur at the output on the side of the laser device driven to oscillate continuously.
In the structure, for example, described above, cross-talk is caused greatly by parasitic capacitance formed between portions where the first electrode A1 and the fourth electrode A4, and the conductor layers L2 and L3 are laminated by way of the interlayer insulation layer 9 and, actually, between opposing ends of the conductor layers L1 and L2, and between L4 and L3, since they are disposed close to each other.
As a method of reducing the parasitic capacitance, it has been devised to increase the thickness of the interlay insulation layer 9 or decrease the area of the electrode or the conductor layer laminated on the interlayer insulation layer 9.
For instance, it has been proposed a structure, as shown in the schematic perspective view of FIG. 17, that the first and fourth electrodes A1 and A4 are also arranged in parallel into stripe patterns like the second and third electrodes A3 and A2, openings 9W1 to 9W4 are apertured respectively to the interlayer insulation layer 9 on each of the electrodes A1 to A4, first to fourth conductor layers L1 to L4 formed into a narrow width to be in contact therewith are extended on the interlayer insulation layer 9, and bonding pads PD1 to PD4 for connection with external leads respectively at the ends thereof are arranged.
However, also in such a constitution, the cross-talk described above could not be improved effectively. This also depends on that the active layer 3 extends with a large area on both outsides for the light emitting sections M1 and M2 on both sides, so that the parasitic capacitance due to the junction capacitance is rather increased.
In FIG. 17, portions corresponding to those in FIG. 9 carry identical reference numerals, for which duplicate explanations is omitted.
Further, in each of the constitutions described above, when an accident that interlayer insulation layer is destroyed upon bonding an external lead to the bonding pad by the pressing force, an accident of short-circuiting the light emitting devices tends to occur.
An object of the present invention is to effectively improve the electrical cross-talk and effectively avoid short-circuit between the light emitting devices.
A semiconductor light emitting device according to the present invention has a constitution in which a plurality of semiconductor light emitting sections are formed side by side on a semiconductor substrate, at least one electrode of the semiconductor light emitting sections and a conductor layer led out electrically from each of the electrodes are formed on one main surface of the semiconductor substrate and the conductor layer is formed overriding the interlayer insulation layer on the semiconductor substrate.
Then, a high resistance isolation region is formed, facing the main surface of the semiconductor substrate, between the semiconductor light emitting sections arranged side by side and on each of the outsides of the light emitting sections disposed on both outsides.
Further, in the present invention, a high resistance isolation region for partitioning a portion for forming a bonding pad formed to the conductor layer from other portions can be formed on each of the outsides of the semiconductor light emitting sections disposed on both outsides.
A method of manufacturing a semiconductor light emitting device according to the present invention comprises a step of forming a semiconductor substrate on which a plurality of semiconductor light emitting sections are formed side by side, a step of forming one of electrodes to the semiconductor light emitting sections on one main surface of the semiconductor substrate, a step of forming a conductor layer electrically led out of the electrode on one main surface of the semiconductor substrate and a step of forming, to the semiconductor substrate, a high resistance isolation region, facing the main surface of the semiconductor substrate, between portions for forming each of the semiconductor light emitting sections and to both outsides of the portions for forming the semiconductor light emitting sections.
In the semiconductor light emitting device according to the constitution of the present invention as described above, since the high resistance isolation region is disposed for all of the plurality of semiconductor light emitting sections, not only between each of the semiconductor light emitting sections but also to the outsides of the semiconductor light emitting sections disposed on both outsides, it is possible to electrically isolate the semiconductor light emitting sections respectively from others, and the parasitic capacitance formed not only between each of the semiconductor light emitting sections but also between the semiconductor light emitting sections disposed on both outsides and the conductor layer of other semiconductor light emitting sections can be reduced and by making the dielectric constant lower, and the cross-talk occurring between the semiconductor light emitting sections caused by the parasitic capacitance can be reduced.
Further, since the extended portions of the active layer present on both outsides are isolated from the semiconductor light emitting sections present on both outsides, the parasitic capacitance due to the junction capacitance in the semiconductor light emitting sections can also be eliminated.
Furthermore, as described above, even when the interlayer insulation layer is broken, for example, upon bonding external bonding pads, short-circuits accident between each of the semiconductor light emitting sections can be avoided by separating the bonding pads of the conductor layer disposed in adjacent with each other by the high resistance isolation region from each other.
Further, in the method of manufacturing the semiconductor light emitting device according to the present invention, the high resistance isolation region is formed also to the outside of the semiconductor light emitting section situated on both outsides of a plurality of semiconductor light emitting sections and, since the high resistance isolation region can be formed simultaneously with the isolation regions for isolating the adjacent light emitting sections from each other, increase in the number of manufacturing steps can be avoided.
In this text, the semiconductor substrate designates not only the substrate constituted entirely with a semiconductor but also includes a substrate in which a semiconductor layer is formed on an insulative or semi-insulative substrate.